 The
ScanPlus system includes the ability to execute boundary-scan tests and
perform In-System Programming in a pre-planned specific order called a
test plan. Test vectors, in the form of Compact Vector Format (CVF) files
which have been generated using ScanExpressTPG, can be automatically executed
and the results displayed and logged to a file. Other formats such as
SVF, JAM, STAPL, and J-Drive are also supported. Different test plans
may be constructed for different UUT's. Tests within a test plan may be
reordered, enabled or disabled. An unlimited number of different tests
can be combined into a test plan. The software used to run these tests
is ScanPlus Runner.
ScanPlus Runner includes a flexible test executive that is used to develop
a test sequence or test plan from various independent tests. These test
steps can then be executed sequentially, repeated any number of times
or run continuously. The main features of the test executive are as follows:
- Utilizes test sequences based on Pass/Fail test results
- Enables test sequence debugging by forcing selected test steps to
skip, stop on failure, or continue on failure
- Logs test results and reports (detailed and summary) to a file
- Prints test results
- Allows the operator to enter their name, UUT name, model number, serial
number, etc. This is used for logging and reporting.
ScanPlus Runner gives the user an overview of all test steps and the
results of executed tests. These results are displayed both for individual
tests as well as for the total test runs executed. ScanPlus Runner provides
the ability to add or remove various test steps from a test plan, or re-arrange
the order of the test steps in a plan. Tests can also be enabled or disabled,
and the test execution can be stopped upon the failure of any particular
test. When a test fails, the user has the option to either accept the
Passed/Failed results and continue testing other boards or display the
cause of the failure as shown in the figure below.
Test and In-System-Programming Execution
Visual Fault Diagnostics
ScanPlus Viewer is a powerful Graphical Fault Identification System
that helps to isolate the source and location of faults encountered during
the manufacturing and design of printed circuit board (PCB) assemblies.
By combining the visual aspects of a photographic image of the PCB assembly
with the detailed layout descriptions supplied by the board netlist and
Boundary-Scan fault-report, a complete visual representation of the target
system is created that facilitates the quick isolation of any failure
under investigation.
With its easy-to-use interface, ScanPlus Viewer will allow even the most
novice users, with little or no Boundary-Scan experience, the complete
ability to pinpoint the exact source and location of PCB assembly failures.
This is true for even the most complex boards and systems with faults
not visible to the naked eye or easily detectable by traditional test
methods. In addition to its powerful usage during manufacturing, testing,
and repair of PCB assemblies, ScanPlus Viewer offers a variety of features
particularly suited for the design engineer. For complete information
on ScanPlus Viewer, please refer to the detailed data sheet for this product.
In addition to automatically running the test steps, ScanPlus Runner
can operate in a debug mode. In this mode the user can interactively perform
vector single stepping, run to vector breakpoint, and loop on vectors
in the Debug window. Any of these operations can be performed in either
Pattern or Waveform mode. The debug mode is very useful for troubleshooting
and determining the source of hard to find failures during test program
development.
Debug information is displayed in Pattern and Waveform modes. The Figure
to the right depicts the Debug window in Waveform mode.
Visual Fault Diagnostics
Interactive Debugging
The ScanPlus Debugger is an excellent tool for engineers doing debug
during prototype design verification and testing. It is very useful for
finding shorts and opens on and between BGA devices and other fine-pitch
components. The ScanPlus Debugger allows interactive control and observation
of all the boundary-scan controllable inputs and outputs on a Unit Under
Test (UUT). It can also apply data to inputs of clusters and read their
responses if the cluster I/Os are accessible via boundary-scan components.
The ScanPlus Debugger software includes an interactive Graphical User
Interface (GUI), as shown below, that assists the user in setting and
monitoring the state of pins on the UUT. A powerful Pin and Netlist browser
with filtering and sorting capabilities allows you to easily select the
pins and/or nets of interest and insert them into the main debug window
for various data manipulation. All debug sessions can be saved and later
recalled for reuse.
Interactive Debugging
ScanPlus Merge - System-Level Test
Until now, boundary-scan testing has been primarily used as a complete
test and programming solution for single printed circuit board (PCB) assemblies.
Now the use of boundary-scan testing can be easily extended to test systems
that consist of multiple PCBs, treating them as a single, combined unit.
ScanPlus Merge can be used to combine multiple target assemblies into
a single boundary-scan compatible target system. ScanPlus Merge has many
applications, including:
- Motherboard and Daughter card(s) assembly testing
- Multiple card chassis testing
- Gang testing of multiple cards
ScanPlus Merge can be used in a similar manner for any system topology.
By providing the netlist and data files for each of the individual assemblies,
ScanPlus Merge will combine them into a single set of files. The merged
files can then be used to generate test vectors for the entire system
as a whole.
ScanPlus Merge is compatible with both ScanExpressTPG and ScanPlus Flash
Generator programs and supports all of the various test generation files.
Furthermore, ScanPlus Merge will automatically merge the connector pins
of the assemblies and combine the nets on both sides of the connectors.
This feature is very useful in motherboard-daughter card applications.
One common application for ScanPlus Merge is the testing of Main and
Daughter boards together as a combined assembly as depicted in the figure
to the right. Testing the three assemblies together and the interconnects
between them, increases the test coverage of the assemblies as a whole.
Merging Modules into a Single Assembly
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