EMA TimingDesigner - What's New in Version 9.1.

What's New in EMA TimingDesigner 9.1

TimingDesigner® is the industry standard tool for interface timing design. It provides an easy to use and intuitive method for defining and analyzing interface timing requirements. The introduction of version 9.1 makes TimingDesigner the only tool that can generate SDC timing constraints from a timing diagram. This enables users to visually define design requirements and then automatically generate SDC to drive place and route.

SDC is an open source industry standard timing constraint format supported by most FPGA and ASIC design flows. Allowing users to generate SDC constraint files from a timing diagram reduces the complexity of the SDC constraint format while providing users a visual verification that their constraints are specifying the desired design intent.

The initial release of TimingDesigner with SDC support focuses on the Altera® FPGA design flow. As a result of this integration, customers can leverage the graphical timing analysis features of TimingDesigner to rapidly develop their SDC timing constraints for Altera devices, with the overall system requirements in mind.

Benefits:

• Enables users to take advantage of powerful features in the SDC constraint format without having to learn all the nuances of writing SDC
• TimingDesigner allows users to easily incorporate timing delays and requirements for all components in the interface, enabling a system level view of timing
• While using TimingDesigner to generate SDC constraints users are also automatically developing documentation to describe interface timing requirements and design intent

Altera TimeQuest Timing Analyzer Interface

TimingDesigner 9.1 now supports a seamless interface with the Altera Quartus® II software. With this new interface TimingDesigner can import diagram specific delay path timing data from Altera TimeQuest Timing Analyzer for analysis and verification. This allows users to incorporate internal FPGA delays into their timing analysis to ensure they are meeting their FPGA and system requirements; providing a platform for final timing signoff on critical interfaces.

TimingDesigner 9.1 also includes a number of general productivity enhancements and updates as part of the ongoing efforts to provide the highest quality timing analysis software on the market.

• Derived Clock - now supports the ability to choose between two modes: Active and Passive
  • Passive - is the classic method of defining delay and uncertainty to a derived clock
  • Active - allows users an easy way to model clocks as they are passed through phase locked loops
• Port List Updates - signal names can be defined independent of a port
• File Clean-Up - automatically clean-up old backup and recovery files to reduce over project size and streamline project tree navigation
• Auto-Complete Functionality - attribute boxes that allow the use of formulas, and/or parameters are now equipped with an auto-complete filter, which will provide a list of available built-in formulas and valid parameters based on the spelling of the entry in the attribute box
• Constraint Violations Check - can now be run at the Project, Component, and Diagram levels
• New Auto-Build Functionality - the Parameter spreadsheet now supports auto-build functions. Users can select a group of variables and with a right click select an operation (min/max, min, max, mean, sum) to apply to those variables
• Delete Warnings - TimingDesigner will now warn users when objects with dependencies have been selected for deletion

EMA continues to support the Design Kit program and has made available over 200 new timing models since the initial release. The TimingDesigner Design Kits are pre-assembled component diagrams complete with all specified libraries for speed and voltage ratings, and are intended to provide designers with a time saving head start for timing analysis of their designs. Each kit consists of all documented timing protocols associated with one or more design components, and are assembled for easy importation into TimingDesigner’s Manager Window allowing quick assembly of any timing project. Design Kits are available to all customers with a valid maintenance contract

About TimingDesigner Design Kit
TimingDesigner Frequently Asked Questions